library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity registrompc is
Port ( entrada : in STD_LOGIC_VECTOR (11 downto 0);
salida : out STD_LOGIC_VECTOR (11 downto 0));
end registrompc;
architecture Behavioral of registrompc is
begin
process(entrada)

begin

if(entrada="00000001000")     then salida <= "000000001001";
elsif(entrada="00000001001")  then salida <= "000000001010";
elsif(entrada="00000001010")  then salida <= "000000001011";
elsif(entrada="100001100000") then salida <= "100001100001";
elsif(entrada="100001100001") then salida <= "100001100010";
elsif(entrada="100001100010") then salida <= "100001100011";
elsif(entrada="100001100011") then salida <= "100001100100"; 
elsif(entrada="110001100000") then salida <= "110001100001";
elsif(entrada="110001100001") then salida <= "110001100010";
elsif(entrada="110001100010") then salida <= "110001100011";
elsif(entrada="110001100011") then salida <= "110001100100";
elsif(entrada="110011100000") then salida <= "110011100001";

else salida <="000000000001";

end if;
end process;
end Behavioral;